| 摘要 |
PURPOSE: To test an integrated electronic chip at a normal processor speed without extremely increasing outside terminals. CONSTITUTION: A testing device (TD1, SC1) which are operated in an emulation mode by an emulating processor DSP2 in order to functionally replace a processor DSP1 of an integrated electronic chip is shown. A first scan path SC1 is constituted of a cell CC1 row, and each cell latches a data bit normally transferred from the other circuit GL to the processor DSP2. The data are serially transferred to a second scan path SC2, processed by the processor DSP2, returned again to the first scan path SC1, and supplied to the other circuit GL. The data transfer between the first and second scan paths (SC1 and SC2) is executed between each processing step of the processor DSP2 so that testing can be executed in a 'real time'. |
