| 摘要 |
PURPOSE:To realize the phase synchronizing signal generating circuit generating a clock signal phase locked with an external trigger signal simply and stably even when a Vp-p voltage of a triangle wave is fluctuated. CONSTITUTION:The circuit is the phase synchronizing signal generating circuit generating a clock signal phase locked with an external trigger signal and featured to be provided with peak hold means 119-121 holding a peak voltage of a phase measurement signal whose frequency is equal to a frequency of the clock signal, a reference voltage generating means generating plural reference voltages V1-V4 based on a holding peak voltage and a phase control means controlling a phase of the clock signal based on the phase data obtained by the comparison between the phase measurement signal and the plural reference voltages. The phase measurement signal is featured to be a triangle wave signal or a sawtooth wave signal. |
