发明名称 |
FIELD EFFECT TRANSISTOR HAVING A MULTILAYER INTERCONNECTION LAYER THEREIN WITH TAPERED SIDEWALL INSULATORS |
摘要 |
A field effect transistor and a method of manufacturing thereof are disclosed that is not reduced in the characteristic of withstanding voltage between multilayer interconnection layers even when scaled to a higher integration. This field effect transistor includes side walls 21a formed on both sides of a bit line 15 so that the bottom side end contacts the upper surface of side walls 20a of gate electrodes 4b and 4c. The thickness of an insulating film interposed between gate electrodes 4b and 4c and a base portion 11a forming a low electrode 11 of a capacitor is not reduced. The characteristic of withstanding voltage is not deteriorated between multilayer interconnection layers even when scaled to higher integration.
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申请公布号 |
US5157469(A) |
申请公布日期 |
1992.10.20 |
申请号 |
US19910685398 |
申请日期 |
1991.04.16 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
OKUDAIRA, TOMONORI;ARIMA, HIDEAKI;OHI, MAKOTO;MOTONAMI, KAORU;MATSUI, YASUSHI |
分类号 |
H01L21/8242;H01L27/10;H01L27/108;H01L29/417;H01L29/78 |
主分类号 |
H01L21/8242 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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