发明名称 CPU RESET SYSTEM
摘要 PURPOSE:To prevent the generation of malfunction in a CPU by connecting a part of terminals of an ordered connector to the terminal of a power supply circuit and then resetting a microprocessor(MC) by signals generated by other terminals connected thereafter. CONSTITUTION:A device, e.g. a printed board 1, provided with an MC 4 and actively loaded/ejected to/from an external circuit, e.g. a case body side circuit 2 through an ordered connector 3 is constituted so that a part of terminals in the connector 3 is connected to the power supply circuit terminal at the time of connecting the connector 3, and the MC 4 is started by reset signals generated by other terminals 3-p, 3-q connected thereafter. Since the CPU 4 is not started in a state that the printed board 1 is actively loaded and only a power supply voltage is impressed to the board 1, the completion of connection of other connector terminals 3-p, 3-q is detected thereafter and the CPU 4 is started only by its detection signal.
申请公布号 JPH04291611(A) 申请公布日期 1992.10.15
申请号 JP19910056788 申请日期 1991.03.20
申请人 FUJITSU LTD 发明人 YOSHIMURA JUNICHI
分类号 G06F1/18;G06F1/24;G06F3/00 主分类号 G06F1/18
代理机构 代理人
主权项
地址