| 摘要 |
PURPOSE:To facilitate the system design or the circuit design of an IC board or a digital IC by fine-adjusting a delay time digitally with respect to the delay adjustment circuit in a semiconductor device. CONSTITUTION:An upper stage pass gate 1 outputs an output signal VOUT with a delay of a basic delay time with respect to an input signal VIN and a lower stage pass gate 2 outputs an output signal VOUT with a delay of a delay time resulting from adding some fraction of the basic delay time to the said basic delay time. Then a selector 3 selects either the upper stage pass gate 1 or the lower stage pass gate 2 based on a digital control signal. |
