发明名称 Short duration power supply back=up for digital counter ICs - uses capacitor and associated switching circuitry to maintain stored counter value during power supply interruptions
摘要 The circuit is formed from a MOS counter (ICI), a timing oscillator, a smoothing/storage capacitor (C2) and a zenor diode (Z1). The square-wave oscillator is formed from transistor T2, capacitor C3 and resistors R1 and R2, the oscillator time constant being determined by R1 and C3. The oscillator output is rectified by a diode (D8B) and, together with the circuit voltage fed via reverse blocking diode (D8A), is used to enable the switching transistor to control the supply voltage to the ICI timing input (5). Capacitors C1 and C5 buffer the oscillator output and provide smoothing, respectively. The circuit voltage is determined by the zener diode and, under normal conditions, is fed via a reverse blocking diode (D4) to the ICI power supply input (16) and to the smoothing capacitor. When the supply voltage (Ub) is removed, the oscillator power supply (to R1, R2 and C3) is broken, the switching transistor is turned off and the counter supplied with power from the smoothing capacitor. ADVANTAGE - Counter backup supply prevents stored counter value being lost in event of power supply interruption.
申请公布号 DE4111859(A1) 申请公布日期 1992.10.15
申请号 DE19914111859 申请日期 1991.04.11
申请人 ROBERT SEUFFER GMBH & CO, 7260 CALW, DE 发明人 KLEINER, ROLF, BAD LIEBENZELL, DE;SCHWARZMEIER, JUERGEN, 7264 BAD TEINACH-ZAVELSTEIN, DE;TRITT, GERHARD, 7277 WILDBERG, DE
分类号 H03K21/40 主分类号 H03K21/40
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