| 摘要 |
<p>A high speed operation system intended for data closed for operations such as floating-point data in which a desired final operational result is obtained by converting the data to the one for which an arithmetic and logic unit (ALU) can be simplified (the number of elements and gate delay time, etc., are reduced) with an encoder PHI , by executing a series of operations for the encoded data, and by restoring the obtained result to the original data representation with a decoder, PSI . The encoding is defined by mappings which correspond completely to the respective ones of the ALU for the original data representation (the ALU for the original operation system), the encoder PHI , the decoder PSI , and the ALU for the encoded data (the ALU for the new operation system). Therefore, the encoding such that the ALU of the new operation system can be simplified can be determined by, for example, utilizing a computer. <IMAGE></p> |
