Copper alloy metallurgies for VLSI interconnection structures.

摘要

A method for providing vias, lines and other recesses in VLSI interconnection structures (28) with copper alloys to create a thin layer (32) of an oxide of an alloying element on the surface of the deposited alloy and on portions of the alloy which are in contact with an oxygen containing dielectric (16) is disclosed. The present invention is also directed to VLSI interconnection structures which utilize this copper alloy and thin oxide layer (32) in their vias, lines and other recesses. The oxide layer (32) eliminates the need for diffusion barrier and/or adhesion layers and provides corrosion resistance for the deposited copper alloy. VLSI devices utilizing this copper alloy in the vias, lines and other recesses interconnecting semiconductor regions, devices and conductive layers on the VLSI device are significantly improved.