| 摘要 |
<p>PURPOSE:To shorten the time period of ON-OFF of a MOS transistor by shifting a voltage at the tip part or a NAND type cell to the high level voltage side of word lines in a specified range. CONSTITUTION:A source or the nMOS transistor(Tr) 27 and the earth terminal 6 of a sense amplifier 4 are connected to the source of a pMOS Tr 8, and a gate and a drain of the Tr 8 are grounded, then the voltages at the source of Tr 27 and at the terminal 6 are set to, e.g. 0.5V. When the word line WL7 is inverted from the H-level to L-level, the Tr 27 is inverted from ON to OFF if the voltage of line WL7 becomes lower than a threshold voltage +0.5V. Since the voltage of terminal 6 is set to the same voltage as that of the source, the delay of operation of the sense amplifier 4 due to the decrease of cell current coming from the decrease of the potential difference between a bit line 3 and the aforementioned source, can be evaded.</p> |
