DELAY-TIME CONVERSION CIRCUIT

摘要

The converting circuit, comprising control circuit part (1) outputting signals (S2,S3) of H level pulse if the input data were dropped from the H level to the L level and delay circuit part (2) outputting the output of the L level according to the period of the signals (S2,S3) after passing of a fixed time, can control variously the transfer delay time without using the variable register. The output signal of multi-flexer and the input data are connected to the input terminal of OR gate, and the output signal of OR gate is connected to the input terminal of NOR gate and control terminal of inverter. This circuit provides the effect of very large integration.