Synchronizer for asynchronous computer command data

摘要

Asynchronous command data are converted to synchronous data by a synchronizer comprising a toggle flip-flop which receives the asynchronous command data to produce a pair of true and complementary outputs in response to a transition of the command data. A first NOR gate is responsive to the command pulses and the true output of the toggle flip-flop to produce a train of first pulses, and a second NOR gate is responsive to the command pulses and the complementary output of toggle flip-flop to produce a train of second pulses. First and second sampling flip-flops are connected to the outputs of the first and second NOR gates, respectively, to sample the first and second pulses therefrom in response to a trailing edge transition of a clock signal with a frequency twice as high as the nominal maximum frequency of the command pulses. The output signals of the first and second sampling flip-flops are sampled in response to a leading edge transition of the clock signal and the sampled output signals are combined to produce a train of output pulses having transitions coinciding with transitions of the clock signal.