发明名称 DIFFERENTIAL CIRCUIT, MULTIPLIER AND PSEUDO LOGARITHM AMPLIFIER
摘要 PURPOSE:To prevent the influence of dispersion in the gate lengths of transistors caused by manufacture dispersion. CONSTITUTION:Various circuits such as a doubler, differential amplifier, multiplier and pseudo logarithm amplifier or the like to be realized by an MOS integrated circuit are composed based on the differential circuit shown in the figure. For this differential circuit, a differential pair is composed of an (m) number of transistors (M1-Mm) respectively connecting drains, gates and sources in common and an (n) number of transistors (Mm-1-Mm-n) respectively connecting drains, gates and sources in common. The respective transistors are formed in the same dimension and the accuracy of output currents (IOUT and IOUT') is decided by a ratio m/n. Since the (m) and (n) are arbitrary integers the ratio is a fixed value. Therefore, the ratio m/n can be defined as a constant not affected by the dispersion in the gate lengths or the gate width caused by the manufacture dispersion of the transistors.
申请公布号 JPH04288713(A) 申请公布日期 1992.10.13
申请号 JP19910078554 申请日期 1991.03.18
申请人 NEC CORP 发明人 KIMURA KATSUHARU
分类号 G06G7/12;H03F3/45;H03G11/08 主分类号 G06G7/12
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