发明名称 COMPUTER SYSTEM
摘要 PURPOSE:To process the bit order conversion by hardware so as to improve the bit order conversion efficiency by providing a bit order conversion part operated by a bit order conversion instruction. CONSTITUTION:An instruction analyzing part 3 in a central processing unit 2 analyzes the instruction received from an instruction register; and when it is the bit order conversion instruction, the part 3 transfers the bit order conversion instruction and the numerical value of a register 4 to the bit order conversion part 5. The bit order conversion part 5 converts the numerical value received from the register 4 in accordance with the bit order conversion instruction received from the instruction analyzing part 3 and returns the result to the register 4. The bit order conversion part 5 operated by the bit order conversion instruction in this manner is provided to execute the prescribed bit order conversion with one instruction step.
申请公布号 JPH04288626(A) 申请公布日期 1992.10.13
申请号 JP19910020322 申请日期 1991.01.22
申请人 NEC CORP 发明人 OZAKI KEIJI
分类号 G06F5/00;G06F9/305 主分类号 G06F5/00
代理机构 代理人
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