MULTI-PURPOSE CACHE MEMORY SELECTIVELY ADDRESSABLE EITHER AS A BOOT MEMORY OR AS A CACHE MEMORY

摘要

In a master-slave multiprocessor (FIG. 1), a slave processor (110) includes a random access memory array (119) that serves at initialization time as the slave processor's boot memory and that serves during normal operation time as the slave processor's cache memory. A master processor (120) writes the slave processor's boot program into the memory array when the memory array is to serve as the boot memory, i.e., following system reset.