| 摘要 |
The on screen display system (OSD) for dereasing the RAM size operates by the following steps: applying the first interupt signal divided by the first divider (11) to the micom (16) after combining the vertical synchronizing signal nd the horizontal synchronizing signal at the AND gate; applying the second interupt signal divided by the second divider to micom after combining the horizontal synchronizing signal and the oscillation clock of oscillator at AND gate; transmitting the data of the on screen display data ROM (15) to the RAM, followed by transmitting the RAM data to the interface section (13); outputting the series data converted from the input parallel data with the synchronizing clock to the OSD. |
