| 摘要 |
The circuit is for simultaneously actuating a level detector and a watch dog circuit to provide a simple and stable reset signal for a central processing unit regardless of the active status (high or low) of the central processing unit. The circuit is composed of 1st comparator (100) for generating signals by comparing the power supply level with a reference level and detecting the signals, 2nd comparator (200) for generating oscillation pulse or cutting them off, and an interfacing unit (300) for interfacing the outputs of the comparators (100,200) to the reset terminal (RST) of a central processing unit.
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