发明名称 FORMATION OF OXIDE SUPERCONDUCTING WIRING
摘要 PURPOSE:To simultaneously obtain anticipated superconduction in all wiring layers by baking a deposited layer constituting a widewidth wiring section and another deposited layer constituting a narrow-width wiring section while the layers are respectively held in different atmospheres. CONSTITUTION:After a grand plane layer which is composed of Bi, Pb, Sr, Ca, and Cu respectively contained at a ratio of Bi:Pb:Sr:Ca:Cu=1.0:0.9:1.0:1.0:1.7, has a size of 10mmX10mm, and contains no pattern and a signal layer having a line width of 1mm are deposited to a thickness of 1m, the layers are baked with such a prescribed temperature profile that the layers are maintained at 805 deg.C for 20 minutes after raising the temperature from a room temperature to 805 deg.C and maintained at 855 deg.C for 1 hour after the temperature is further raised from 805 deg.C to 855 deg.C, and then, the temperature of the layers is lowered to the room temperature. It is found as a result of X-ray diffraction investigations that the Ca2PbO2 peak is high in the grand plane layer having the 10mmX10mm size, but very weak in the signal layer having the 1-mm line width.
申请公布号 JPH04287323(A) 申请公布日期 1992.10.12
申请号 JP19910051882 申请日期 1991.03.18
申请人 FUJITSU LTD 发明人 TANAKA ATSUSHI;KAMEHARA NOBUO;NIWA KOICHI
分类号 C23C14/35;C23C14/08;H01L21/285;H01L21/3205;H01L23/52 主分类号 C23C14/35
代理机构 代理人
主权项
地址