发明名称 DATA ABNORMALITY DETECTING METHOD FOR MULTI-CPU SYSTEM
摘要 <p>PURPOSE:To detect abnormality in the case of destroying a control data at the system having the same control data in plural CPU. CONSTITUTION:Each time fixed time passes after a power source is turned on, a command part 16 of a master CPU 11 transmits a control data return command to a slave CPU 12, and a command reception part 17 of the slave CPU 12 monitors this return command by utilizing the idle time of an operation control part 18. When the return command is received, a data transfer part 19 transfers the data to a shared memory 15 while dividing the block with the control data on a local memory 14 corresponding to the return command, and a data check part 20 of the master CPU 11 compares the control data in the shared memory 15 with the control data on the local memory 14. When the both data are coincident, the command part 16 loads activation again after the fixed time, when they are not coincident, a display part 21 displays the address of the abnormal data and the error generating time on a display device 2, and the transfer is stopped.</p>
申请公布号 JPH04284564(A) 申请公布日期 1992.10.09
申请号 JP19910048521 申请日期 1991.03.14
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 ICHIHARA MASARU;HANADA KEIJI
分类号 G05B15/02;G05B23/02;G06F15/16;G06F15/177 主分类号 G05B15/02
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