| 摘要 |
PURPOSE:To realize the write protection of a cache area in a personal computer system using 80486 CPU. CONSTITUTION:A decoding circuit 11 decodes an address and a status signal from CPU 13 and outputs WRTP only at the write time of a memory in the write protection area of the cache area. A cache invalid circuit 12 outputs an EADS signal and invalidates the content of a cache memory concerned. The write protection of the cache memory in CPU 13 can be realized by the operation. |
