发明名称
摘要 PURPOSE:To eliminate the need for oscillation frequency synchronization between a master and a slave power supplies by providing an error amplifying and pulse-width modulating circuit only to the master side power supply and using its pulses as control pulses of the slave side power supply in common. CONSTITUTION:The master-side power supply 10 turns on and off a switching transistor (TR)3 to flow a current through the primary winding of an output transformer 2, and rectifies and smoothes an AC voltage developed across its secondary winding to obtain a DC output V0, which is supplied to a load L. This DC output V0 is compared with the output of a reference voltage source 12 by the error amplifying and pulse-width modulating circuit 11 to control the output voltage V0 to a constant value. A current transformer 15, on the other hand, detects the primary current and an overcurrent detecting circuit 16 reduce the width of driving pulses at the time of overloading. Further, the slave-side power unit 20 is constituted similarly, but the error amplifying and pulse-width modulating circuit 11 is used in common between both power supplies. Consequently, the master and slave power supplies 10 and 20 are both placed in switching operation all the time regardless of whether load capacity is large or small.
申请公布号 JPH0462083(B2) 申请公布日期 1992.10.05
申请号 JP19840189739 申请日期 1984.09.12
申请人 HITACHI SEISAKUSHO KK;AIGA DENSHI KOGYO KK 发明人 NOMOTO YASUNARI;IWASA JUZABURO;MASUKO MASASUKE
分类号 G05F1/10;G05F1/00;H02J1/10;H02M3/28 主分类号 G05F1/10
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