| 摘要 |
<p>A multiport memory comprising a plurality of ports provided for writing or reading data to or from memory cells (2a,2b); a plurality of bit lines and a plurality of word lines provided corresponding to said plurality of ports; switches for electrically connecting said bit lines, corresponding to said word lines through the same port, to said memory cells depending on the levels of said word lines; and means for substantially short-circuiting the bit lines corresponding to the port selected for write operation among the bit lines corresponding to a plurality of selected ports and the selected other optional bit lines, whenever a plurality of word lines belonging to the same row are selected by a plurality of ports for writing or reading. The short-circuiting means improve the reliability of operation in cases where memory (2a,2b) cells in the same row are accessed from more than one port simultaneously. <IMAGE></p> |
