发明名称 METHOD FOR PREVENTION OF LEAKAGE CURRENT AT TRENCH CAPACITY-TYPE DYNAMIC RANDOM-ACCESS MEMORY
摘要 PURPOSE: To develop a means for structurally preventing 'gate diode leakage currents' generated at a trench upper edge part in a field plate insulating DRAM having a trench type capacitance. CONSTITUTION: A carrier storage area 50 formed by ion placing is provided on the side wall face of a trench 16 punched in a semiconductor substrate 48, and a multicrystal silicon layer 56s is coated on the carrier storage area 50 so that the upper end part area of the trench 16 can be included. Moreover, a storage dielectric layer 52 covering the whole part of the trench side wall face is accumulated on the multicrystal silicon layer 56s, and a field plate 32 is provided on it. In another way, the carrier storage area 50 can be constituted not of the ion placing layer but of the multicrystal silicon layer 56s which is directly and simultaneously doped and accumulated to the side wall face of the trench 16 of the semiconductor substrate 48. In both ways, the multicrystal silicon layer 56s formed under the storage dielectric layer 52 can prevent gate diode leakage currents.
申请公布号 JPH04274361(A) 申请公布日期 1992.09.30
申请号 JP19910320577 申请日期 1991.12.04
申请人 TEXAS INSTR INC <TI> 发明人 GISHI CHIYUNGU;UIRIAMU AARU MATSUKII;KURARENSU DABURIYU TENGU
分类号 H01L27/10;H01L21/02;H01L21/8242;H01L27/108 主分类号 H01L27/10
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