<p>Disclosed herein is an LCD driver circuit comprising a plurality of cascade-connected LCD drivers. The LCD driver circuit can be activated to apparently make a latch pulse input thereto active on the trailing edge thereof and operated even if a corresponding clock pulse is input in confronting relationship during a period in which the latch pulse is being input. Each of the LCD drivers has a latch pulse control circuit for selecting either one of a first latch pulse signal and a second latch pulse signal generated corresponding to the first latch pulse signal in accordance with an enable signal input at the time that the LCD drivers are cascaded, thereby to control an enable latch circuit and a shift register.</p>
