| 摘要 |
A process for forming a thin film field effect transistor, particularly adapted for use in SDRAM devices using CMOS flip-flop circuits, wherein the transistor has a drain-channel P-N junction that is precisely spaced from the gate electrode, the process involving the etch back of the edge of the gate electrode, either prior to ion implantation to form the source and drain, or following the implantation.
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