发明名称 MULTI-PLL SYNTHESIZER
摘要 PURPOSE:To make the reference frequency of a PLL synthesizer high and to vary the frequency range in a simple and delicate way even in an MHz band. CONSTITUTION:This synthesizer is provided with less number of components and adjustment positions such that the output of a mixer 17 for which the outputs of VCOs 14, 21 of two sets of PLLs sharing the reference freqnency of a single fixed oscillator 11 are connected via a fixed frequency divider 18 is fed back to the one PLL.
申请公布号 JPH04271520(A) 申请公布日期 1992.09.28
申请号 JP19910056119 申请日期 1991.02.26
申请人 KYOCERA CORP 发明人 KANO HIDETO
分类号 H03L7/197;H03L7/22 主分类号 H03L7/197
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