| 摘要 |
PURPOSE:To generate a long run length and to improve the efficiency of encoding by extending the scanning order of discrete cosine conversion (DCT) coefficients to a larger block. CONSTITUTION:Plural adjacent DCT blocks are regarded as a large super-block and the same number of the same frequency components with the DCT blocks are extracted from the super-block and rearranged in the increasing frequency order. When at least one zero coefficient value continues, the number of the successive zero coefficient value is encoded by using run-length codes. When the DCT block size is 64 and the super-block size is 640, a transmission order converting circuit consists of memories 21 and 22, 64-scale counters 23 and 24, decimal counters 25 and 26, and AND gates 28 and 29 of two 640-word systems. Consequently, a long run length is allowed, the encoding efficiency is improved, and the picture quality is improved. |
