发明名称 SYNCHRONIZATION PATTERN DETECTION SYSTEM
摘要 PURPOSE:To suppress remarkable deterioration in a detection probability of a frame synchronizing signal included in a serial data in a digital communication line with a high error rate. CONSTITUTION:A coincidence circuit 4a discriminates the coincidence between a frame synchronizing signal included in a serial data 2 and a predetermined synchronization pattern 5 for each bit and the result of discrimination controls analog switches 6-1-6-n for each bit. When an output of an analog adder 8 exceeds a level of a comparison signal 11 fed to an analog comparator 12, a comparison output 13 goes to a high level and the end of synchronization is discriminated. The synchronization bit number in the synchronization pattern comprising plural bits is set in the unit of bit. Thus, the discrimination criterion is realized in a range not causing an error to suppress the reduction in the frame synchronization detection probability considerably.
申请公布号 JPH04271540(A) 申请公布日期 1992.09.28
申请号 JP19910032543 申请日期 1991.02.27
申请人 NEC CORP 发明人 IKEGAMI HIROSHI
分类号 H04L7/08 主分类号 H04L7/08
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