发明名称 INTEGRATED CIRCUIT DEVICE
摘要 <p>PURPOSE:To match the phase of an output clock signal and that of an inside clock signal. CONSTITUTION:The integrated circuit device is equipped with an input buffer 12 to receive an input clock signal 10, clock driver 18 to generate an inside clock signal 22, phase difference detection circuit 24 to input an output clock signal 28 and the inside clock signal 22 and to detect the phase difference, low-pass filter 34 to define the output of the said phase difference detection circuit 24 as an error voltage, voltage control delay circuit 20 to input the output of the input buffer 12 and to control a signal delay amount according to the output of the low-pass filter 34 as mentioned above, and output buffer 26 to receive the output of the said voltage control delay circuit 20 and to output the output clock 28, and the phases are matched.</p>
申请公布号 JPH04270405(A) 申请公布日期 1992.09.25
申请号 JP19900408821 申请日期 1990.12.28
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 NISHIMICHI YOSHIHITO
分类号 G06F1/10;G06F15/78;G11C11/407 主分类号 G06F1/10
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