| 摘要 |
<p>PURPOSE:To reduce an exchange speed of a packet exchange independently of a packet length. CONSTITUTION:A packet is provided with a time stamp representing an input order by packet allocating circuits 101-1-101-4 and outputted to one switch circuit in plural switch circuits 102-1-102-4. The switch circuits 102-1-102-4 implement exchange processing based on the address information of the packet. After the packet is outputted from the switch circuits 102-1-102-4, the output order of the packets is decided by packet order arrangement circuits 103-1-103-4 based on the time stamp and the result is outputted.</p> |
