| 摘要 |
<p>A semiconductor memory device comprises a memory cell array in which cascade-gate dynamic memory cells (MCi) are arranged in a matrix and which contains word lines (WL0a to WL0e, ..., WLna to WLne) connected in common to the memory cells in the same row and bit lines (BL) connected in common to the memory cells in the same column; and serial access control means (31, 32, 33, 34, 35, 41) which serially accesses a plurality of memory cells in a given column of the memory cell array, reads a plurality of bits of information in time-sequence from one of the memory cells storing information, and then sequentially rewrites the bits of information into a different memory cell unused for storing valid data, in the same column where the memory cell exists. <IMAGE> <IMAGE></p> |
