| 摘要 |
<p>PURPOSE:To provide a test circuit which enables to speed up a test, simplify the test and to reduce the number of pins used in a microcomputer by combining instruction decoders for ease of the testing. CONSTITUTION:A ROM code 5b of instruction decoders 5 are put in order, instructions 5a are combined in accordance with the order and an address output 8 from an address output circuit 4, which transmits an address output based on a control clock PHI3 from a clock generating circuit 2, is directly inputted to ROM code input.</p> |
