| 摘要 |
PURPOSE:To successively input data, in a multiplying circuit which successively calculates the product of the input data and a prescribed coefficient by a serial data. CONSTITUTION:Each bit of one data (a) is serially inputted through AND gates 2A-2C which calculate the partial product of the each bit of the data (a) and bits D0-D2 having possibilities of turning to '1' in the other coefficient C, to plural full adders 3A-3C, and the digit rising outputs of those plural full adders are respectively returned through unit delay elements 4A-4C to their own inputting parts. Then, the sum outputs of the full adders 3-3B are respectively supplied through delay circuits 6A and 6B to the inputting parts of the full adders 3B and 3C at low-order sides, and a full adder 10 adds the sum outputs and the digit rising outputs of the plural full adders 3A-3C while successively returning them to its own inputting part. Then, the products (b)1 and (b)2 of the input data (a) and the prescribed coefficient C can be obtained from the full adder 3C of the minimum digit among the plural full adders, and the sum output terminal of the full adder 10. |
