发明名称 |
SEMICONDUCTOR MEMORY APPARATUS |
摘要 |
PURPOSE:To obtain a high-performance semiconductor memory unit capable of preventing the deterioration in memory characteristics due to soft errors. CONSTITUTION:This apparatus comprises a switching transistor consisting of an n<+> type impurity diffusion layer 4 functioning as a drain made by forming a single memory cell on the side wall portion of an island region 3, a gate insulating film 5 and an n<+> type impurity diffusion layer 7 as a source formed on the upper portion of the island region 3 and gate electrode 6 used as word line and of a capacity portion made of the first and second storage electrodes 8 and 11 formed on the island region 3 so as to permit mutual overlap between adjacent memory cells and similarly the first and second capacitor insulating films 9 and 12 and a plate electrode 14; and each memory cell is electrically insulated by a groove 2. Therefore, the first capacitor insulating film 9 and the second capacitor insulating film 12 forming the capacity portion is located at the position separated from a semiconductor substrate 1. By doing this, the above is not easily affected by a leak current occurred in the semiconductor substrate 1, and it is possible to obtain a semiconductor memory apparatus with the capacity portion having a high resistance against soft errors. |
申请公布号 |
JPH04257257(A) |
申请公布日期 |
1992.09.11 |
申请号 |
JP19910018596 |
申请日期 |
1991.02.12 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
YASUHIRA MITSUO;MATSUYAMA KAZUHIRO;NAITO KOJI |
分类号 |
H01L27/10;H01L21/8242;H01L27/108 |
主分类号 |
H01L27/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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