| 摘要 |
<p>A sampling phase detector (20) for a phase locked loop system receives a gate signal (gate) derived from the output (Fo) of a voltage controlled oscillator (10) to enable the phase detector. A reference signal (strobe) is applied to the phase detector to charge one of two capacitors (C1,C2) during the gate period, the capacitor being charged being determined by the state of the reference signal. At the end of the gate period the difference in charge between the two capacitors is transferred to the output of the phase detector as a control voltage signal (Vo) to correct the output of the voltage controlled oscillator to be in phase with the reference signal.</p> |
