发明名称 |
Reduced execution time convert to binary circuit |
摘要 |
An apparatus for converting a multidigit decimal number into a binary number. In a preferred embodiment, the apparatus includes a register for holding the multidigit decimal number; first conversion logic, coupled to the register, for simultaneously converting a first pair of decimal digits in the multidigit decimal number, into a first binary representation and second conversion logic, coupled to said first conversion logic and the register, for simultaneously converting a second pair of decimal digits in the multidigit decimal number and the first binary representation into a second binary representation of a decimal number defined by the first and second pair of decimal digits.
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申请公布号 |
US5146422(A) |
申请公布日期 |
1992.09.08 |
申请号 |
US19910722588 |
申请日期 |
1991.06.27 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORP. |
发明人 |
MAASS, KLAUS K.;SHEN, DAVID T. |
分类号 |
F02B75/02;G06F7/48;G06F7/52;G06F7/535;H03M7/12 |
主分类号 |
F02B75/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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