发明名称 |
OPERATING SPEED DECIDING SYSTEM FOR INFORMATION PROCESSOR |
摘要 |
<p>PURPOSE:To always set an operating speed in accordance with the environment of a working power supply by providing a frequency selection circuit which selects an operating speed according to the type of the power supply. CONSTITUTION:A frequency selection circuit which selects and decides an operating frequency consists of a dividing circuit 5 which generates a low speed clock signal 8 and a high speed clock signal 9 by dividing a basic clock signal 7 and a selector circuit 4 which selects the signal 8 or 9 with reception of a power voltage deciding signal 11. When an AC is inputted to a power supply 1, the signal 11 has a high level end an operating clock signal 10 has the same frequency as the signal 9. Meanwhile the signal 11 has a low level and the signal 10 has the same frequency as the signal 8 with a battery power supply 15.</p> |
申请公布号 |
JPH04252314(A) |
申请公布日期 |
1992.09.08 |
申请号 |
JP19910025069 |
申请日期 |
1991.01.28 |
申请人 |
NEC CORP;KOUBE NIHON DENKI SOFUTOUEA KK |
发明人 |
IGA KAZUHISA;HAGIWARA YOSHIHIRO |
分类号 |
G06F1/32;G06F1/06 |
主分类号 |
G06F1/32 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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