| 摘要 |
PURPOSE:To restrain the decline in the absolute value of the substrate back bias voltage in a bar in-test mode for stabilizing the potential thereof by a method wherein the title semiconductor integrated circuit device is provided with a substrate voltage generating circuit so that the potential of the substrate back bias voltage may be substantially stabilized within the specific range of the outer and inner power supply voltages CONSTITUTION:A dynamic RAM is provided with a substrate voltage generating circuit VBBG to generate a specific substrate back bias voltage VBB receiving an outer power supply VCC. On the other hand, the potential of the inner power supply voltage VCL generated by a step-down circuit VD is to be boosted in proportion to the outer power supply voltage VCC until reaching the first potential V1 and then held at the reference potential VCL0 until reaching the second potential V2. Later, the bar in-test region BT wherein the potential of the outer power supply voltage VCC is boosted higher than the second potential V2, said potential of the inner power supply voltage VCL is to be boosted in proportion to the potential of the outer power supply voltage VCC. |
