发明名称 |
Circuit arrangement for the routine testing of an interface between line terminator groups and the switching matrix network of a PCM telecommunication switching system |
摘要 |
The interfaces between line terminator groups of a pair of redundant line terminator groups each comprise an interface circuit which makes it possible, by being equipped with a write-read memory, a switch-over device and a control device that controls these components, to test the interface parts belonging to an active line terminator group in a spot-check fashion during a time channel reserved for this purpose and to test the interface parts belonging to the passive line terminator group during all time channels on the basis of a respective check word mirroring.
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申请公布号 |
US5146474(A) |
申请公布日期 |
1992.09.08 |
申请号 |
US19910652610 |
申请日期 |
1991.02.08 |
申请人 |
SIEMENS AKTIENGESELLSCHAFT |
发明人 |
NAGLER, WERNER;KRUMENACKER, RUDOLF |
分类号 |
H04J3/14;H04M3/24;H04Q11/04 |
主分类号 |
H04J3/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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