发明名称 CIRCUIT CONFIGURATION FOR CLOCK-CONTROLLED TIME DIVISION MULTIPLEX TELECOMMUNICATIONS SWITCHING INSTALLATIONS
摘要 In a circuit configuration for clock-controlled time division multiplex telecommunications switching installations, including PCM telephone switching installations with central switching network and connected subswitching networks, line groups are connected to a central switching network via time division multiplex lines and have one subswitching network and one group control unit each are pairwise assigned to each other. Line units which are individually assigned to the one or the other of two line groups are, in normal operation, connected to the subswitching network of their own line group and can be changed over to the subswitching network of the particular other line group in standby operation. In the line units, equalizing memorys are provided in duplicate and, specifically, in each instance for the message stream to and from line group-common subswitching network, on the one hand, and for the message stream to and from the subswitching network of the particular partner line group. The equalizing memories receive the pulse clock for their clock-controlled output processes in each instance from that subswitching network to which they output their messages. First equalizing memories receive their pulse clock from their own line group; second equalizing memories receive their pulse clock from the particular partner line group.
申请公布号 US5146453(A) 申请公布日期 1992.09.08
申请号 US19890410688 申请日期 1989.09.21
申请人 SIEMENS AKTIENGESELLSCHAFT 发明人 NAGLER, WERNER;HLAWA, FRITZ;SCHMIDT, LOTHAR
分类号 H04J3/06;H04Q11/04 主分类号 H04J3/06
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