| 摘要 |
PURPOSE:To make the processing unit small and to reduce the power consumption by connecting a video decoding section to each of plural compression video memories and applying video processing to plural video decoding outputs. CONSTITUTION:A video decoder 20 receives a video compression data via a transmission line and is designated of to which of compression video memories 4,5,6 the data is to be written and writes the video compression data to the compression video memory 4. Then a read instruction is given to the decoder 20, the compression video memory 4 is read, and a decode circuit 44 decodes the data into the original video data and it is displayed. Moreover, while the compression video memory 4 is read and decoded and the data is displayed, the video data is written to the compression video memory 5, a read instruction reads the compression video memory 5 and the data is decoded and displayed. This is applied similarly even to the compression video memory 6. Furthermore, a video processing circuit 11 applies arithmetic processing to the video data. |
