发明名称 Fully differential sample and hold adder circuit
摘要 A fully differential sample and hold, switched-capacitor adder circuit is disclosed, where a single-ended and fully differential signals can be added together. Thus in one single operation, the adder circuit performs two functions conventionally performed by two separate circuits: converting the single-ended voltage signal into fully differential; and adding this converted differential signal to another differential signal. The adder circuit includes an operational amplifier, capacitors and switches for performing the operation. The circuit is economical when implemented in silicon.
申请公布号 US5144160(A) 申请公布日期 1992.09.01
申请号 US19900600526 申请日期 1990.10.19
申请人 ACER INCORPORATED 发明人 LEE, KUANG-LU;CHIOU, SHEAN-YIH
分类号 G06G7/14;G11C27/02 主分类号 G06G7/14
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