| 摘要 |
1. A method of realisation of a distributor of address space of memory groups in digital systems characterized in that the most significant part of address bus is compared, with the use of comparators sequence (K1/KN-1), with the lowest addresses of memory groups (P1/PN-1), and the results of such comparison are used to unblock the decoders (D0/DN-1) of memory groups (P0/PN-1) in such a manner that the zero decoder (D0) is unblocked when the most significant part of address bus is smaller than the most significant part of the lowest address of the first memory group (P1), the last decoder (DN-1) is unblocked when the most significant part of address bus is bigger than or equal to the most significant part of the lowest address of the last memory group (PN-1), and each of the remaining decoders (D1/DN-2) is unblocked when the most significant part of address bus is bigger than or equal to the most significant part of the lowest address of the memory group with the number compatible with the decoder's number, and lower than the most significant part of the lowest address of memory group with the further number.<IMAGE>
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