| 摘要 |
PURPOSE:To suppress deterioration in the return characteristic of frame synchronization in the frame synchronization system utilizing CRC. CONSTITUTION:A reception data storage buffer of a frame synchronization detection section 8 and a latch circuit of a CRC processing section 9 are reset by a reset signal 12. Then the frame synchronization detection section 8 detects a frame synchronization pattern every time one bit of a reception data string is inputted and the CRC processing section 9 calculates a CRC data 15 from a data 16 inputted from the reception data by a multi-frame. Then the CRC check bit in the frame received this time and the arithmetic data having been calculated for each 1-bit input in advance are collated on the condition of the detection of the frame synchronization pattern. Thus, the correctness of the CRC check bit is discriminated as soon as the synchronization pattern is detected. |
