| 摘要 |
The method for integrating a high voltage transistor and a general transistor in one chip comprises the steps of forming an N+ buried layer (3) into a Si substrate (1) to grow an epitaxial layer (4) over the whole substrate (1), ion-implanting and diffusing an N impurities to form N+ buried layers (51',52'), forming a P+ buried layer (6) for isolating between the devices by ion-implanting and diffusing P impurities, forming a second epitaxial layer (7) on the whole substrate, ion-implanting and diffusing N impurities to form N+ collector regions (81',82'), forming a P+ buried layer (9) as a second isolation area by ion-implanting and diffusing P impurities and forming base and emitter regions into the epitaxial layer (7).
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