发明名称 METHOD FOR CONTROLLING PROCESSOR CLOCK SIGNAL AND INFORMATION PROCESSING SYSTEM
摘要 JA9-91-004 METHOD FOR CONTROLLING PROCESSOR CLOCK SIGNAL AND INFORMATION PROCESSING SYSTEM In order to ensure that an allowed time to stop a processor, or an allowed time to delay an operation of the processor is determined to stop the supply of a clock signal to the processor, the supply of the clock signal to the processor is controlled by a program that runs in the lowest priority under a multitask operating system. In providing a clock control program, the latter runs only when no other tasks run. Thus, the supply of the clock signal to the processor can be controlled on or off for each time interval indicated by the system timer.
申请公布号 CA2061056(A1) 申请公布日期 1992.08.26
申请号 CA19922061056 申请日期 1992.02.12
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 NAOSHI, SUZUKI;SHUNYA, UNO
分类号 G06F1/04;G06F1/08;G06F1/32;G06F9/48;(IPC1-7):G06F1/08 主分类号 G06F1/04
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