发明名称 Low voltage, deep junction device and method
摘要 A method of fabricating a low voltage, deep junction semiconductor device includes providing first and second wafers of opposite conductivity types, each having a dopant concentration of at least 4.0x1016 atoms/cc. After cleaning the wafers and removing heavy metal impurities therefrom by gettering, the wafers are bonded together. This method results in the successful fabrication of semiconductor devices having a junction depth in the range of 20 to 500 microns and a breakdown voltage of less than 20 volts.
申请公布号 US5141887(A) 申请公布日期 1992.08.25
申请号 US19910687192 申请日期 1991.04.17
申请人 MOTOROLA, INC. 发明人 LIAW, HANG M.;D'ARAGONA, FRANK S.;ROOP, RAYMOND M.;OLSEN, DENNIS R.
分类号 H01L21/18;H01L21/306 主分类号 H01L21/18
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