发明名称 |
APPARATUS FOR INTERFACING DATA LINK SPEED BETWEEN DIFFERENT SIGNAL SYSTEMS |
摘要 |
The apparatus is fit for realizing level one function of 7-class open layer system for data communication protocol of ISDN exchange system. The apparatus includes a time switch interface unit (37) for receiving 2MCLK and FS signal of a time switch and for transmitting data having speed of 2.048 Mbps to a time switch, a bit speed changer (51) for changing 64 Kbps or 56 Kbps data up to 2.048 Mbps, and for vice-versa, a parity code checker (52) for inserting parity or detecting parity bit, an error detection circuit (53) for detecting error of 2MCLK and FS signal, a data channel interfacing unit (56) for enabling a terminal or a protocol chip to receive or to transmit 64 Kbps and 56 Kbps, and a loop back controller (55) for detecting error of link.
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申请公布号 |
KR920007101(B1) |
申请公布日期 |
1992.08.24 |
申请号 |
KR19890020549 |
申请日期 |
1989.12.30 |
申请人 |
KOREA TELECOMMUNICATIONS CORP.;KOREA ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE |
发明人 |
IM, SONG - RYOL;SO, JONG - UK;LEE, HYONG - HO;CHOE, HAE - UK |
分类号 |
H04L12/825;H04L12/26;(IPC1-7):H04L12/56 |
主分类号 |
H04L12/825 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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