发明名称 ELECTRONIC DEVICE
摘要 <p>PURPOSE: To cope with allowable tolerance for arranging chips into high density mutual connection structure, in a form wherein a restriction is not applied to both a signal conductor layer and a wiring equipment. CONSTITUTION: When suitable positions, where a first and a second matching conductors 30, 40 are arranged to each contact pad or chip are determined, the position where a signal layer is arranged, is first determined. Positions to the first and the second matching conductors are selected so that the first matching conductor 30 overlaps a contact pad 18, by an amount sufficient to form a via connection between the matching conductor and the contact pad. In the same way, a position for the second matching conductor 40 is determined as follows: sufficient overlap is obtained for the first matching conductor 30, a via hole connecting the matching conductors can be accurately positioned in the overlapping part, a cover pad 58 of signal conductor for connecting the second matching conductor 40 with a contact pad concerned is completely arranged on the second matching conductor, and connection is placed at a position which is connectable by a correct via.</p>
申请公布号 JPH04233256(A) 申请公布日期 1992.08.21
申请号 JP19910173316 申请日期 1991.06.19
申请人 GENERAL ELECTRIC CO <GE> 发明人 SEODORA RICHIYAADO HOORAA;ROBAATO JIYON UONAROUSUKI
分类号 H01L23/12;H01L23/538;H05K1/18;H05K3/46 主分类号 H01L23/12
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