| 摘要 |
In the interleaving circuit of digital audio apparatus, the data of L.R channel quantized by sampling frequency is circulated in the order of L channel even number- R channel even number- L channel odd number- R channel odd number as N/2 bit symbol unit, and recorded at a memory region resulted from dividing by four the remaining region except the error correcting code region. The block address signal is generated for assigning the odd number block address after assigning the even number block address. The adjacent two even number symbol addresses are assigned in order in the time of scanning the odd number after counting the scan number of block address generating the signal.
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