EEPROM assembly with writing and verifying control unit - assigns array of floating gate through tunnelling memory cell transistors in lines and columns to each EEPROM

摘要

The memory system has a number of similar memories coupled in common to a write-in verification control which verifies the written state of the selected memory cell transistors of the memory array for each memeory by checking the corresp. electrical threshold values. A new write-in operation can be effected by application of a given voltage within a defined time interval, with repetition of the write-on operation until the write-in verification control indicates the written state for the corresp. memory cell transistor. ADVANTAGE - Efficient programming without increased cost.